Struct w806_pac::rcc::clock_enable::CLOCK_ENABLE_SPEC

pub struct CLOCK_ENABLE_SPEC;

Software configure clock gate enable

By configuring this clock gating enable register, you can control the clock to shutdown a specified function, so as to achieve the purpose of shutting down a certain module.

In order to provide the firmware with flexibility to control the power consumption of the system, the clock and reset module provides the clock gating function of each module in the system. When the clock of the corresponding module is turned off, the digital logic and clock tree of the module will stop working, which can reduce the dynamic power consumption of the system.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see clock_enable module

Trait Implementations

impl Readable for CLOCK_ENABLE_SPEC

read() method returns clock_enable::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CLOCK_ENABLE_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CLOCK_ENABLE_SPEC

reset() method sets clock_enable to value 0x7fff

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CLOCK_ENABLE_SPEC

write(|w| ..) method takes clock_enable::W writer structure

type Writer = W

Writer type argument to write, et al.