Struct w806_pac::rcc::clock_enable::R

pub struct R(_);

Register clock_enable reader

Implementations

impl R

pub fn touch(&self) -> TOUCH_R

Bit 21 - Touch sensor module clock gate enable

By default, touch sensor module clock gate is enabled.

pub fn sdio(&self) -> SDIO_R

Bit 18 - Secure digital input/output clock gate enable

By default, SDIO master module clock gate is enabled.

pub fn rsa(&self) -> RSA_R

Bit 16 - RSA Montgomery coprocessor clock gate enable

By default, RSA clock gate is enabled.

pub fn i2s(&self) -> I2S_R

Bit 15 - Inter-Integrated Sound clock gate enable

By default, I2S clock gate is enabled.

pub fn pwm(&self) -> PWM_R

Bit 13 - Pulse-width modulation module clock gate enable

By default, PWM clock gate is enabled.

pub fn adc(&self) -> ADC_R

Bit 12 - Analog-digital converter clock gate enable

pub fn gpio(&self) -> GPIO_R

Bit 11 - General purpose input/output clock gate enable

By default, GPIO clock gate is enabled.

pub fn timer(&self) -> TIMER_R

Bit 10 - Timer module clock gate enable

By default, timer clock gate is enabled.

pub fn dma(&self) -> DMA_R

Bit 8 - Direct memory access clock gate enable

By default, DMA clock gate is enabled.

pub unsafe fn uart(&self, n: usize) -> UART_R

Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart0(&self) -> UART_R

Bit 1 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart1(&self) -> UART_R

Bit 2 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart2(&self) -> UART_R

Bit 3 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart3(&self) -> UART_R

Bit 4 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart4(&self) -> UART_R

Bit 5 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn uart5(&self) -> UART_R

Bit 6 - Universal asynchronous transmitter/receiver enable

By default, UART clock gate is enabled.

pub fn i2c(&self) -> I2C_R

Bit 0 - Inter-Integrated Circuit module enable

By default, I2C clock gate is enabled.

Methods from Deref<Target = R<CLOCK_ENABLE_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CLOCK_ENABLE_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CLOCK_ENABLE_SPEC>> for R

fn from(reader: R<CLOCK_ENABLE_SPEC>) -> Self

Converts to this type from the input type.