Struct w806_pac::rcc::reset_control::RESET_CONTROL_SPEC

pub struct RESET_CONTROL_SPEC;

Software module reset control

The chip provides the soft reset function of each subsystem, and the subsystem reset can be achieved by setting the corresponding bit of this register to 0. However, the reset state will not be automatically cleared. To restore normal operation, the corresponding bit of this register must be set to 1.

The soft reset function does not reset the CPU and watchdog. In this register, the reset operation of APB, BUS1 and BUS2 (corresponding to APB bus, system bus and data bus) is not recommended, which will cause system access device abnormality.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see reset_control module

Trait Implementations

impl Readable for RESET_CONTROL_SPEC

read() method returns reset_control::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for RESET_CONTROL_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for RESET_CONTROL_SPEC

reset() method sets reset_control to value 0xffff_ffff

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for RESET_CONTROL_SPEC

write(|w| ..) method takes reset_control::W writer structure

type Writer = W

Writer type argument to write, et al.